Algo-Logic launches low latency FPGA-powered order-book

Algo-Logic Systems, a recognized leader in providing hardware-accelerated, deterministic, ultra-low-latency products, systems and solutions for accelerated finance, packet processing and embedded system industries, yesterday announced availability of their new Full Order-Book solution.

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The Full Order-Book performs all book building processing and reporting as logic inside a single FPGA. The Low Latency Order-Book is designed using the on-chip memory for customer book sizes with many thousands of open orders, a dozen symbols, and reporting of ten L-2 levels. For use-cases where millions of open orders, thousands of symbols, and unlimited levels need to be tracked, the Scalable Order-Book is still implemented with a single FPGA but stores data in off-chip DDR3 memory.

The Full Order-Book building process includes (i) maintaining L-3 order-level book, (ii) updating L-2 book with a default of 10 price levels, (iii) reporting the Top-of-book with the best bid/ask information, and (iv) displaying of the last trade. Tracking deep L-3 book with ultra-high performance is achieved using Algo-Logic’s proprietary, 150 Million Searches Per Second (MSPS), algorithmic EMSE-2 IP-Core. The depth of the constructed L-2 book is user-configurable via the application programmable interface. Unlike multi-FPGA or CPU-based competitor architectures; Algo-Logic’s single-FPGA platform architecture achieves deterministic, ultra-low-latency without jitter regardless of the number of tracked symbols at data rates of up to 10 Gbps. Key features include:

  • Full Order-Book with a L-2 default size of 10 price-levels per symbol, fully scalable to larger sizes
  • Depth of L-2 price-levels configurable by the user via the application programmable interface
  • Full Order-Book output logic seamlessly connects to customer’s algorithmic trading strategies
  • Normalized Full Order-Book output stream compatible with any downstream processing logic
  • L-3 Order-Book updates complete with processing latency of less than 450 nanoseconds
  • L-3 + L-2 Order-Book updates complete with processing latency of less than 1 microsecond

The Full Order-Book can be seamlessly integrated with other components of Algo-Logic’s Low Latency Application Library, including pre-built protocol parsing libraries, market data filters, and TCP/IP endpoints to deploy complete tick-to-trade applications within a single FPGA platform.

Algo-Logic's world-class hardware accelerated systems and solutions are used by banks, trading firms, hedge-funds, and financial institutions to accelerate their network processing for protocol parsing, symbol filtering, Risk-Checks (sec 15c 3-5), order book processing, order injection, proprietary trading strategies, high frequency trading, financial surveillance systems, and algorithmic trading.

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